> For the complete documentation index, see [llms.txt](https://docs.ndi.video/all/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://docs.ndi.video/all/faq/sdk/what-system-resources-are-required-to-support-a-design-including-the-ndi-fpga-codecs.md).

# What system resources are required to support a design including the NDI FPGA Codecs?

To properly implement the FPGA codecs in the NDI Advanced SDK requires: 

* ARM (or x86) CPU running Linux for the NDI software libraries 
* Shared memory between the CPU and FPGA for communicating the compressed NDI data
* Register access to the FPGA from the CPU 
* Frame buffer memory for the FPGA to store uncompressed video data (does not need to be visible to the CPU)

For these reasons the examples provided all target SoC+FPGA parts from Xilinx and Altera.  Using an SoC+FPGA part is not mandatory, but anything else will require additional development effort and similar system performance (eg: a PCIe link to the FPGA could work well for transferring NDI compressed data and register I/O). 

For more detailed information see [FPGA Projects](broken://pages/Q3hTROfVkctfn2ML2k5H)


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